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 U4280BM
AM / FM - PLL
Description
The U4280BM is an integrated circuit in BICMOS technology for frequency synthesizer. It performs all the functions of a PLL radio tuning system and is controlled by I2C bus. The device is designed for all frequency synthesizer applications of radio receivers, as well as RDS (Radio Data System) applications.
Features
D Frequency range up to 150 MHz D Pre-amplifier for AM and FM D Fine tuning steps: AM 1kHz D Two programmable 16-bit divider,
adjustable from 2 to 65535
D Reference oscillator up to 15 MHz D 5 programmable switching outputs,
4 are open drain outputs up to 15 V
y FM y 2 kHz
D Phase detector with separate outputs for AM and FM D Controlled via I2C bus
Ordering Information
Extended Type Number U4280BM-B U4280BM-BFL Package DIP20 SO20 Remarks
Block Diagram
PRT OSCIN 18 19 OSCOUT Latch SCL SDA AS 2 Latch 3 4 I2C - BUS interface Shift register Latch Phase detector Current sources Status 14 15 13 12 AMOSC Preamplifier AM / FM- switch N - Divider Analog outputs 16 PDFM PDAM PDFMO PDAMO Oscillator R - Divider 5 SWO1 SWO2 SWO3 AM/FM 6 7 8 9
Switching outputs
10 FMOSC
Preamplifier : 2 11 GND2 1 VDD 20 GND1
Lock detector
17
LD
13346
Figure 1. Block diagram
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
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Preliminary Information
U4280BM
Pin Description
VDD SCL 1 2 20 GND1 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol VDD SCL SDA AS PRT SWO1 SWO2 SWO3 AM/FM FMOSC GND2 AMOSC PDFMO PDFM PDAM PDAMO LD OSCIN OSCOUT GND1 Function Supply voltage I2C bus clock I2C bus data Address selection Switching port Switching output 1 Switching output 2 Switching output 3 Switching output AM/FM FM oscillator input Ground 2 (analog) AM oscillator input FM analog output FM current output AM current output AM analog output Lock detect Oscillator input Oscillator output Ground 1 (digital)
19 OSCOUT 18 OSCIN 17 LD 16 PDAMO 15 PDAM 14 PDFM 13 PDFMO 12 AMOSC 11 GND
13319
SDA 3 AS PRT 4 5
SWO1 6 SWO2 7 SWO3 8 AM/FM 9 FMOSC 10
Figure 2. Pinning
Functional Description
The U4280BM is controlled via the 2-wire I2C bus. For programming there are one module address byte, two subaddress bytes and five data bytes. The module address contains a programmable address bit A 1 which with address select input AS (Pin 4) makes it possible to operate two U4280BM-B in one system. If bit A 1 is identical with the status of the address select input AS, the chip is selected. The subaddress determines which one of the data bytes is transmitted first. If subaddress of R-divider is transmitted, the sequence of the next data bytes is DB 0 (Status), DB 1 and DB 2. If subaddress of N-divider is transmitted, the sequence of the next data bytes is DB 3 and DB 4. The bit organisation of the module address, subaddress and 5 data bytes are shown in figure 2 Each transmission on the I2C bus begins with the "START "-condition and has to be ended by the "STOP"condition (see figure 3). The integrated circuit U 4283 BM has two separate inputs for AM and FM oscillator. Pre-amplified AM signal is directed to the 16 bit N-divider via AM/FM switch, whereas (pre-amplified) FM signal is first divided by a fixed prescaler ( :2 ). AM/FM switch is controlled by software. Tuning steps can be selected by 16 bit R-divider. Further there is a digital memory phase detector. There are two separate current sources for AM and FM amplifier (charge pump) as given in electrical characteristics. It allows independent adjustment of gain, whereby providing high current for high speed tuning and low current for stable tuning.
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Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
U4280BM
Bit Organization
Module address MSB 1 A7 1 A6 0 A5 0 A4 1 A3 0 A2 0/1 A1 LSB 0 A0
Subaddress (R-divider)
X
X
X
X
0
1
X
X
Subaddress (N-divider)
X
X
X
X
1
1
X
X
Data byte 0 (Status)
MSB PRT D7
SWO1 D6
SWO2 D5
SWO3 D4
AM/ FM D3
PD ANA D2
PD POL D1
LSB PD CUR D0
Data byte 1
215
R-divider
28
Data byte 2
27
R-divider
20
Data byte 3
215
N-divider
28
Data byte 4
27
N-divider
20
AM/FM PD - ANA PD - POL PD - CUR
LOW FM-operation PD analog Negative polarity Output current 2
Figure 3.
HIGH AM-operation TEST Positive polarity Output current 1
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Preliminary Information
U4280BM
Transmission Protocol
S MSB LSB Address A7 A0 A Subaddress R-divider A Data 0 A Data 1 A Data 2 A P
S
MSB LSB Address A7 A0
A
Subaddress N-divider
A
Data 3
A
Data 4 A
A
P
S = Start
P = Stop
A = Acknowledge
Figure 4.
Absolute Maximum Ratings
Parameters Supply voltage Pin 1 Input voltages Pins 2, 3, 4, 10, 12, 18 and 19 Output currents Pins 3, 5, 6, 7, 8 and 9 Output drain voltage Pins 6, 7, 8 and 9 Ambient temperature range Storage temperature range Symbol VDD VI IO VOD Tamb Tstg Value -0.3 to +6 -0.3 to VDD + 0.3 -1 to +5 20 -25 to +85 -40 to +125 Unit V V mA V C C
Thermal Resistance
Parameters Junction ambient Symbol RthJA Value 160 Unit K/W
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Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
U4280BM
Electrical Characteristics
VDD = 5 V, Tamb = 25C, otherwise specified Parameters Supply voltage range Quiescent supply voltage FM input sensitivity Test Conditions / Pins Pin 1 Pin 1 RG = 50 W Pin 10 fi = 30 to 60 MHz fi = 70 to 120 MHz fi = 120 to 130 MHz RG = 50 W Pin 12 fi = 0.4 to 35 MHz RG = 50 W Pin 18 fi = 0.1 to 15 MHz Pin 5 IH = 1 mA IL = 1 mA IL = 0.1 mA SWO1 to SWO3, AM/FM (open drain outputs) LD (open drain) IL = 1 mA Phase detector PDFM Output current 1 Output current 2 PDAM Pin 15 Output current 1 Output current 2 Pins 14 and 15 to VDD Pins 14 and 15 to GND H input voltage, Pins 2 and 3 L input voltage, Pins 2 and 3 ISDAH = 3 mA Pin 2 Pin 14 IO1 IO2 IO1 IO2 I13,16 I13,16 VIH VIL VO fSCL tr tf tH tL twSTA thSTA tsSTA tsDAT thDAT Pins 6 to 9 IL = 1 mA IL = 0.1 mA Pin 17 VOL 400 100 75 20 0.1 3 0 0 500 125 100 25 -1 0.5 0.4 V VOL VOL 0.4 0.1 V V VOH VOL VOL VDD - 0.4 0.4 0.1 V V V Symbol VDD IDD VI Vi Vi Vi Vi Min. 4.5 Typ. 5.0 6.0 Max. 5.5 11.6 Unit V mA mV mV mV mV mV 65535
50 25 50 25 100 2
AM input sensitivity Oscillator input sensitivity Adjustable divider 1) Switching output, PRT
600 150 100 30 -2 VDD 1.5 0.4 110 1 300
mA mA mA mA
mA mA V V V kHz
Analog output I2bus inputs SCL, SDA Output voltage Clock frequency Bus timing Rise time SCL, SDA Fall time SCL, SDA "H" phase SCL "L" phase SCL Waiting time START Set up time START Set up time STOP Set up time DATA Hold time DATA
1)
ms ms ms ms ms ms ms
ns ns
4 4.7 4 4 4.7 250 0
FM input frequency is additionally divided by two (Pin 10).
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
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Preliminary Information
U4280BM
Bus Timing
twSTA
SDA tHIGH tsSTA tLOW tr tf tsSTO
SCL thSTA START CLOCK tsDAT DATACHANGE thDAT STOP
13347
Figure 5. Bus timing
VDD 3 k PDFM PDAM 22 k
13401
13 PDFMA 16 PDAMA
Figure 6. Analog outputs PDFMA, PDAMA
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Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
U4280BM
Application Circuit
V DD R5 4.7 k R4 1.5 k C4 22 pF 20 C2 100 nF 19 18 4 MHz C5
LD
Test out C7 100 nF C6 82 pF R8 180 k
AM input R6 15 k C8 2.2 nF V tune 30 V
22 pF 17 16 15 14 13 12 11 FM-Tuner VCO
U4280BM
C1 1 F 1 2 3 4 5 6 7 8 R1 3.9 k 9 10 C3 1 nF FM
R2 750 I C - Master -Transmitter
2
R3 300 LED
13348
Figure 7. Application circuit
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
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Preliminary Information
U4280BM
Package Information
Package DIP20 (CEI)
Dimensions in mm
26.42 25.40 7.87 7.37
3.80 3.05 0.89 0.38 3.81 3.18 1.65 1.14 22.86 20 11 0.38 0.20 2.54 6.6 6.1
9.40 7.62
technical drawings according to DIN specifications 13042
1
10 9.15 8.65 12.95 12.70 7.5 7.3
Package SO20
Dimensions in mm
2.35
0.4 1.27 11.43 20 11
0.25 0.10 10.50 10.20
0.25
technical drawings according to DIN specifications 13038
1
10
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Preliminary Information
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
U4280BM
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
TELEFUNKEN Semiconductors Rev. A1, 10-Apr-97
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Preliminary Information


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